Integrated circuits are generally produced from single-crystal silicon, polysilicon or amorphous silicon wafers using a photolithography process. This process uses a mask through which light intended to expose a layer of photosensitive material (photoresist) deposited on the wafer is passed. Following this lithography step, the wafer is then etched to remove material, forming a three-dimensional pattern on the surface of the circuit. The exposure/etching process is carried out a number of times to generate the patterns of the various constituent layers of the circuit.
Certain circuits are larger in size than the size of the mask of the photolithography apparatus (stepper). Specifically, the masks or reticles used in present-day lithography processes are about a few centimeters by a few centimeters in size, whereas certain imager circuits have a large area, for example larger than or equal to 100 cm2.
When the circuit comprises identical elements (typically a matrix-array structure, for example imagers, displays or sensors, or memories), one solution is to divide the circuit into identical blocks, which are produced from a single mask shifted a number of times in one or two directions. This process is called “field stitching” or just “stitching”. In other words, the circuit is formed from a number of exposures of a semiconductor wafer through one or more masks. Each of the exposures allows a multitude of elements of the circuit, for example several tens, hundreds, or even thousands of pixels in the case of stitching of the matrix-array zone of an image sensor, to be produced.
The various blocks are overlaid so as to ensure an overlap of the electrical connections between blocks.
FIG. 1 describes one exemplary matrix-array “stitched circuit” 101 comprising blocks A, L′ and C′ each corresponding to a pattern repeated a number of times. In FIG. 1, the blocks are shown separated for the sake of clarity, but in fact they overlap in order to ensure the electrical connections. A matrix-array circuit 101 is for example a display (such as an LCD screen), a detector (such as an x-ray detector) or a memory circuit (such as a flash CMOS memory circuit).
The blocks A are composed of rows, columns and pixels located at the intersection of the rows and columns, which form the actual matrix array. For example a block A may contain 10×10 to 100×100 pixels, the complete matrix array possibly comprising several thousand rows and columns.
The blocks L′ and C′ comprise circuits for addressing the rows and columns, which circuits are commonly called “drivers”.
These blocks are located on the periphery of the matrix array on two perpendicular sides. For example the blocks L′ comprise row drivers and the blocks C′ column drivers. One block, L′ or C′, may comprise a plurality of drivers, each driver controlling a plurality of rows or columns. A row driver is configured to process the electrical command signals of a plurality of rows during the addressing of the matrix-array circuit 101, these signals being signals to be injected into the rows or originating from the rows and to be collected to be processed, depending on the type of matrix-array circuit, and likewise for the column drivers. The block D is a physically rectangular corner with no particular function.
Thus, the matrix-array circuit of FIG. 1 is composed of 3×3 blocks A, 3 blocks L′ for example addressing the rows and 3 blocks C′ for example addressing the columns.
The blocks A, L′ and C′ are identical to one another by nature, because they are produced from the same pattern, and cannot therefore be distinguished from one another. For certain applications, it may be advantageous to identify the various blocks from one another.
A first simple solution consists in using an additional connection pad to distinguish the blocks from one another. But this solution complexifies the already very dense interconnection of matrix-array circuits comprising many pixels.
On the scale of identification of a pixel, U.S. Pat. No. 7,928,762 describes an identification circuit for each pixel of a given column, the circuit comprising an adder that increments as the rank of the pixel increases in the column. This circuit is based on an active component and thereby has the drawback of needing to be powered.
Furthermore, the column and row drivers receive certain signals that are required to control them, which signals are referred to as functions, via connection pads located on the periphery of the matrix array. Generic functions for all the circuits are for example a CHIP SELECT function (turn-on of the circuit), a POWER DOWN function (low-power mode), the RESET function (reset of a digital portion) and a zoom function. These pads are able to connect the column and row drivers to external circuits.
These functions are generic and used by all the drivers of the identical blocks (L′ or C′).
The masking technique, which is identical from block to block, necessitates the repetition of the connection pads for each block. Thus, to distribute a function 1 F1 over a dedicated bus running through all the identical blocks, it is necessary to inject this function via one connection pad pad1 per block. According to the prior art, there is therefore, per block, one pad per function, such as illustrated in FIG. 2 for 3 identical blocks L′ and 3 functions, function 1 F1, function 2 F2 and function 3 F3, distributed from connection pads pad1, pad2 and pad3, respectively. The drawback is that this method requires many pads.